base
Abstract base class for hardware components acting as logic containers.
Base
Bases: BlockInterface, ABC
Abstract base class for hardware components.
Provides a structured way to define internal logic hierarchies by wrapping complex logic into a single modular unit.
Source code in src/ecc_analyzer/core/base.py
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__init__(name)
Initializes the component and triggers the internal block configuration.
Parameters:
| Name | Type | Description | Default |
|---|---|---|---|
name
|
str
|
The descriptive name of the hardware component. |
required |
Source code in src/ecc_analyzer/core/base.py
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compute_fit(spfm_rates, lfm_rates)
Delegates the FIT rate transformation to the internal root block.
This allows the component to be treated as a single modular unit within the system, hiding its internal complexity.
Parameters:
| Name | Type | Description | Default |
|---|---|---|---|
spfm_rates
|
dict[FaultType, float]
|
Current residual failure rates. |
required |
lfm_rates
|
dict[FaultType, float]
|
Current latent failure rates. |
required |
Returns:
| Type | Description |
|---|---|
dict[FaultType, float]
|
tuple[dict[FaultType, float], dict[FaultType, float]]: Updated FIT rates |
dict[FaultType, float]
|
processed by the internal root block. |
Source code in src/ecc_analyzer/core/base.py
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configure_blocks()
abstractmethod
Abstract method to define the internal logic structure (root block).
Must be implemented by subclasses to specify the internal tree of blocks (e.g., using SumBlock, PipelineBlock).
Source code in src/ecc_analyzer/core/base.py
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